With secure partitioning, developers can bring new levels of security and guaranteed realtime performance to their embedded designs. However, since conventional partitioning schemes are limited to uniprocessor designs, protecting systems that contain two, four, eight, or more processing cores can be a complex and resource-intensive exercise.
This webinar explores how an OS that combines partitioning with true symmetric processing (SMP) can allow partitions to take full advantage of multiple cores in a highly flexible and resource-efficient manner.
| Date: | June 20, 2007 |
| Time: | 2 pm EDT (18:00 GMT, 11:00am PDT) |
| Duration: | 1 hour |
| Registration: | www.techonline.com |
Description:
With secure partitioning, developers can bring new levels of security and guaranteed realtime performance to their embedded designs by placing applications into secure compartments, or partitions where each partition is allocated a guaranteed portion of memory or CPU time. These resource guarantees allow developers to:
Now that multi-core processors are becoming mainstream, however, developers need a way to implement secure partitioning across two, four, eight, or more processing cores. The problem is, conventional partitioning schemes are limited to uniprocessor designs. Consequently, developers who wish to protect their systems must attempt to partition each core separately, usually by proliferating multiple copies of the operating system on each core a complex and resource-intensive exercise.
In this webinar, we explore how an OS that combines partitioning with true symmetric processing (SMP) can address this problem, allowing partitions to take full advantage of multiple cores in a highly flexible and resource-efficient manner.
Learn how to span two or more cores with one partition, how to share a single core with multiple other partitions, and how to add, remove, or reconfigure partitions without code changes or redesign. This webinar will also demonstrate how this flexibility can easily accommodate future growth in software features and allow the software design to move easily across hardware platforms.
Estimated Length: 1 hour, including Q & A.
Prerequisites: There are no prerequisites for this session.
Who should Attend: This one-hour seminar with a short Q&A will be of great interest to embedded software development managers, architects, and developers who are considering using a multi-core processor for an upcoming project.
Speaker Biography
Mark Roberts is director of product management at QNX Software Systems, responsible for product roadmaps, product line management and product marketing. He comes to QNX with over 20 years of Semiconductor industry experience in Wireless LAN, Networking Systems-on-a-chip, and highly integrated Embedded Processors. Mark has a BScEE, computer engineering from the University of Waterloo.
About QNX Software Systems